diff options
| author | tslil clingman <tslil@posteo.de> | 2022-10-02 14:36:55 +0200 |
|---|---|---|
| committer | tslil clingman <tslil@posteo.de> | 2022-10-02 14:37:55 +0200 |
| commit | a1483f5a566e327fafd3f52a1353bc546de37068 (patch) | |
| tree | f604980041dd55e60de364fc22f35a5073bba5e7 /fpkb_v2/gerber/fpkbdv2-job.gbrjob | |
| parent | 60ef0eb8accb31d2dbbf25bee898a59a62cc43f9 (diff) | |
v3 pcb with thicker traces, different routing (VCC+GND on one side, switches other)
Diffstat (limited to 'fpkb_v2/gerber/fpkbdv2-job.gbrjob')
| -rw-r--r-- | fpkb_v2/gerber/fpkbdv2-job.gbrjob | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/fpkb_v2/gerber/fpkbdv2-job.gbrjob b/fpkb_v2/gerber/fpkbdv2-job.gbrjob index 47c1568..78a423f 100644 --- a/fpkb_v2/gerber/fpkbdv2-job.gbrjob +++ b/fpkb_v2/gerber/fpkbdv2-job.gbrjob @@ -3,9 +3,9 @@ "GenerationSoftware": { "Vendor": "KiCad", "Application": "Pcbnew", - "Version": "(6.0.7)" + "Version": "(6.0.8)" }, - "CreationDate": "2022-09-18T10:35:53+02:00" + "CreationDate": "2022-10-02T14:36:07+02:00" }, "GeneralSpecs": { "ProjectId": { @@ -24,10 +24,10 @@ "DesignRules": [ { "Layers": "Outer", - "PadToPad": 0.0, - "PadToTrack": 0.0, + "PadToPad": 0.2, + "PadToTrack": 0.2, "TrackToTrack": 0.2, - "MinLineWidth": 0.25, + "MinLineWidth": 0.5, "TrackToRegion": 0.508, "RegionToRegion": 0.508 } @@ -90,24 +90,29 @@ }, { "Type": "SolderMask", + "Thickness": 0.01, "Name": "Top Solder Mask" }, { "Type": "Copper", + "Thickness": 0.035, "Name": "F.Cu" }, { "Type": "Dielectric", + "Thickness": 1.51, "Material": "FR4", "Name": "F.Cu/B.Cu", "Notes": "Type: dielectric layer 1 (from F.Cu to B.Cu)" }, { "Type": "Copper", + "Thickness": 0.035, "Name": "B.Cu" }, { "Type": "SolderMask", + "Thickness": 0.01, "Name": "Bottom Solder Mask" }, { |