diff options
| author | tslil clingman <tslil@posteo.de> | 2022-10-02 14:36:55 +0200 |
|---|---|---|
| committer | tslil clingman <tslil@posteo.de> | 2022-10-02 14:37:55 +0200 |
| commit | a1483f5a566e327fafd3f52a1353bc546de37068 (patch) | |
| tree | f604980041dd55e60de364fc22f35a5073bba5e7 /fpkb_v2/fpkbdv2.kicad_pro | |
| parent | 60ef0eb8accb31d2dbbf25bee898a59a62cc43f9 (diff) | |
v3 pcb with thicker traces, different routing (VCC+GND on one side, switches other)
Diffstat (limited to 'fpkb_v2/fpkbdv2.kicad_pro')
| -rw-r--r-- | fpkb_v2/fpkbdv2.kicad_pro | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/fpkb_v2/fpkbdv2.kicad_pro b/fpkb_v2/fpkbdv2.kicad_pro index d1a2e3c..ab61069 100644 --- a/fpkb_v2/fpkbdv2.kicad_pro +++ b/fpkb_v2/fpkbdv2.kicad_pro @@ -48,7 +48,13 @@ "min_clearance": 0.508 } }, - "diff_pair_dimensions": [], + "diff_pair_dimensions": [ + { + "gap": 0.0, + "via_gap": 0.0, + "width": 0.0 + } + ], "drc_exclusions": [], "meta": { "filename": "board_design_settings.json", @@ -106,13 +112,20 @@ "min_microvia_drill": 0.09999999999999999, "min_silk_clearance": 0.0, "min_through_hole_diameter": 0.3, - "min_track_width": 0.19999999999999998, + "min_track_width": 0.5, "min_via_annular_width": 0.049999999999999996, "min_via_diameter": 0.39999999999999997, "use_height_for_length_calcs": true }, - "track_widths": [], - "via_dimensions": [], + "track_widths": [ + 0.0 + ], + "via_dimensions": [ + { + "diameter": 0.0, + "drill": 0.0 + } + ], "zones_allow_external_fillets": false, "zones_use_no_outline": true }, |