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+/* Tiny I2C
+
+ David Johnson-Davies - www.technoblogy.com - 14th April 2018
+
+ CC BY 4.0
+ Licensed under a Creative Commons Attribution 4.0 International license:
+ http://creativecommons.org/licenses/by/4.0/
+*/
+
+#ifndef TinyI2CMaster_h
+#define TinyI2CMaster_h
+
+#include <stdint.h>
+#include <avr/io.h>
+#include <util/delay.h>
+
+// ATTiny84 specifics
+
+/* #define DDR_USI_CL DDR_USI */
+/* #define DDR_USI DDRB */
+
+/* #define PORT_USI_SDA PORTB0 */
+/* #define PORT_USI_SCL PORTB2 */
+/* #define PORT_USI_CL PORT_USI */
+/* #define PORT_USI PORTB */
+
+/* #define PIN_USI_SDA PINB0 */
+/* #define PIN_USI_SCL PINB2 */
+/* #define PIN_USI_CL PIN_USI */
+/* #define PIN_USI PINB */
+
+// ATTiny24 specifics
+#define DDR_USI_CL DDR_USI
+#define DDR_USI DDRA
+
+#define PORT_USI_SDA PORTA6
+#define PORT_USI_SCL PORTA4
+#define PORT_USI_CL PORT_USI
+#define PORT_USI PORTA
+
+#define PIN_USI_SCL PINA4
+#define PIN_USI_SDA PINA6
+#define USI_START_VECTOR USI_START_vect
+#define USI_OVERFLOW_VECTOR USI_OVF_vect
+#define PIN_USI_CL PIN_USI
+#define PIN_USI PINA
+
+// Defines
+#define TWI_FAST_MODE
+
+#ifdef TWI_FAST_MODE // TWI FAST mode timing limits. SCL = 100-400kHz
+#define DELAY_T2TWI (_delay_us(2)) // >1.3us
+#define DELAY_T4TWI (_delay_us(1)) // >0.6us
+#else // TWI STANDARD mode timing limits. SCL <= 100kHz
+#define DELAY_T2TWI (_delay_us(5)) // >4.7us
+#define DELAY_T4TWI (_delay_us(4)) // >4.0us
+#endif
+
+#define TWI_NACK_BIT 0 // Bit position for (N)ACK bit.
+
+void i2c_init(void);
+uint8_t i2c_read(void);
+uint8_t i2c_readLast(void);
+uint8_t i2c_write(uint8_t data);
+uint8_t i2c_start(uint8_t address, int8_t readcount);
+void i2c_stop(void);
+
+static int8_t I2Ccount;
+uint8_t transfer(uint8_t data);
+
+#endif