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<title>keyboard/fpkb_v5/fpkb_v5.kicad_pcb, branch main</title>
<subtitle>Layout optimiser and schematics for FPKB</subtitle>
<id>https://git.l-3.space/keyboard/atom/fpkb_v5/fpkb_v5.kicad_pcb?h=main</id>
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<updated>2026-08-28T18:24:48Z</updated>
<entry>
<title>v5: somehow GND and RAW were flipped on pins 1&amp;2 on the mcu footprint???</title>
<updated>2026-08-28T18:24:48Z</updated>
<author>
<name>tslil</name>
<email>tslil@posteo.de</email>
</author>
<published>2026-03-22T16:28:32Z</published>
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<id>urn:sha1:c1534a190a48067b286dfbb0f707c9a6c27a60ab</id>
<content type='text'>
</content>
</entry>
<entry>
<title>v5: routing complete</title>
<updated>2026-08-28T18:24:48Z</updated>
<author>
<name>tslil</name>
<email>tslil@posteo.de</email>
</author>
<published>2026-03-15T15:05:30Z</published>
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<content type='text'>
</content>
</entry>
<entry>
<title>v5: incremental progress on routing, swap orientation for switch contacts</title>
<updated>2026-08-28T18:24:48Z</updated>
<author>
<name>tslil</name>
<email>tslil@posteo.de</email>
</author>
<published>2026-03-15T10:49:15Z</published>
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<id>urn:sha1:f423efcbf36e8ee4948a89ac08a4bb3984c26c17</id>
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</entry>
<entry>
<title>v5: definitely routable</title>
<updated>2026-08-28T18:24:48Z</updated>
<author>
<name>tslil clingman</name>
<email>tslil@posteo.de</email>
</author>
<published>2026-03-14T23:11:50Z</published>
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</entry>
<entry>
<title>v5: trying to make this possible to route</title>
<updated>2026-08-28T18:24:48Z</updated>
<author>
<name>tslil clingman</name>
<email>tslil@posteo.de</email>
</author>
<published>2026-03-14T21:24:08Z</published>
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<id>urn:sha1:5c1ec416cd669ab67cfff3ee42cd5600590a9b1f</id>
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<entry>
<title>v5: fix spacing, placement, add vias to gnd</title>
<updated>2026-08-28T18:24:48Z</updated>
<author>
<name>tslil clingman</name>
<email>tslil@posteo.de</email>
</author>
<published>2026-03-13T18:44:52Z</published>
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<id>urn:sha1:d7d5accc5fb814ffaf6f1985bcc4c745a0bc3894</id>
<content type='text'>
</content>
</entry>
<entry>
<title>v5: space things slightly closer together (choc -&gt; kail ulp)</title>
<updated>2026-08-28T18:24:48Z</updated>
<author>
<name>tslil clingman</name>
<email>tslil@posteo.de</email>
</author>
<published>2026-03-13T16:39:23Z</published>
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<id>urn:sha1:a5e030d6d993377f795ea98c7537e14dad976aff</id>
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</entry>
<entry>
<title>v5: initial PCB</title>
<updated>2026-08-28T18:24:48Z</updated>
<author>
<name>tslil clingman</name>
<email>tslil@posteo.de</email>
</author>
<published>2026-03-13T16:21:49Z</published>
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